Features

• 1.6GHz –3dB Small Signal Bandwidth
• Low Distortion Driving 50Ω Load, 2.4V_P-P Out
    -100dBc/–69dBc HD2/HD3 at 140MHz
    -80dBc IM3 and 46dBm OIP3 at 140MHz
    -100dBc/–66dBc HD2/HD3 at 380MHz
    -68dBc IM3 and 39dBm OIP3 at 380MHz
• 1.5nV/√Hz Output Noise
• 4.3pA/√Hz Input Current Noise
• Programmable High Speed, Fast Recovery Output Clamping
• 4.28_P-P Maximum Output Swing on a 50Ω Differential Load
• DC-Coupled Signal Path
• Operates on Single 4.75V to 5.25V Supply
• Power: 615mW on 5V, Can Be Reduced to 370mW,
• Shutdown Mode 120mW
• 3mm x 4mm 20-Lead QFN Package

Typical Application

Description

The LTC6417 is a differential unity gain buffer that can drive a 50Ω load with extremely low noise and excellent linearity. It is well suited for driving high speed 14- and 16-bit pipeline ADCs with input signals from DC to beyond 600MHz. Differential input impedance is 18.5kΩ, allowing 1:4 and 1:8 transformers to be used at the input providing additional system gain in 50Ω systems.

With no external biasing or gain setting components and a flow-through pinout, the LTC6417 is very easy to use. It can be DC-coupled and has a common mode output offset of -60mV. The LTC6417 input pins are internally biased to provide an output common mode voltage that is set by the voltage on the VCM pin for AC-coupled applications.

Supply current is typically 123mA and the LTC6417 operates on supply voltages ranging from 4.75V to 5.25V. Power consumption can be reduced to 74mA via the PWRADJ pin. The LTC6417 also has a hardware shutdown feature which reduces current consumption to 24mA.

The LTC6417 features fast, adjustable output voltage clamping to help protect subsequent circuitry. The CLHI pin sets the maximum swing, while a symmetric minimum swing is set up internally. LTC6417 V_OR pin will signal overrange when the clamps limit output voltage.

The LTC6417 is packaged in a 20-lead 3mm x 4mm QFN package. Pinout is optimized for placement directly adjacent to Linear Technology’s high speed 14- and 16-bit ADCs.