Features

• Dual, 180° Phased Controllers Reduce Required
  Input Capacitance and Power Supply Induced Noise
• OPTI-LOOP® Compensation Minimizes C_OUT
• ±1% Output Voltage Accuracy (LTC3728LC)
• Power Good Output Voltage Indicator
• Phase-Lockable Fixed Frequency 250kHz to 550kHz
• Dual N-Channel MOSFET Synchronous Drive
• Wide V_IN Range: 4.5V to 28V Operation
• Very Low Dropout Operation: 99% Duty Cycle
• Adjustable Soft-Start Current Ramping
• Foldback Output Current Limiting
• Latched Short-Circuit Shutdown with Defeat Option
• Output Overvoltage Protection
• Low Shutdown I_Q: 20µA
• 5V and 3.3V Standby Regulators
• 3 Selectable Operating Modes: Constant Frequency, Burst Mode® Operation and PWM
• 5mm x 5mm QFN and 28-Lead Narrow SSOP Packages

Typical Application

Description

The LTC3728L/LTC3728LX are dual high performance step-down switching regulator controllers that drive all N-channel synchronous power MOSFET stages. A constant frequency current mode architecture allows phase lockable frequency of up to 550kHz. Power loss and noise due to the ESR of the input capacitors are minimized by operating the two controller output stages out of phase.

OPTI-LOOP compensation allows the transient response to be optimized over a wide range of output capacitance and ESR values. The precision 0.8V reference and power good output indicator are compatible with future microprocessor generations, and a wide 4.5V to 28V (30V maximum) input supply range encompasses all battery chemistries.

A RUN/SS pin for each controller provides both soft-start and optional timed, short-circuit shutdown. Current foldback limits MOSFET dissipation during short-circuit conditions when overcurrent latchoff is disabled. Output overvoltage protection circuitry latches on the bottom MOSFET until V_OUT returns to normal. The FCB mode pin can select among Burst Mode, constant frequency mode and continuous inductor current mode or regulate a secondary winding. The LTC3728L/LTC3728LX include a power good output pin that indicates when both outputs are within 7.5% of their designed set point.