Features

• Very Low V_IN(MIN): 1.5V
• Ultrafast Transient Response
• True Current Mode Control
• 5V Drive for N-Channel MOSFETs Eliminates Auxillary 5V Supply
• No Sense Resistor Required
• Uses Standard 5V Logic-Level N-Channel MOSFETs
• V_OUT(MIN): 0.4V
• V_OUT Tracks 1/2 V_IN or External V_REF
• Symmetrical Source and Sink Output Current Limit
• Adjustable Switching Frequency
• t_ON(MIN) <100ns
• Power Good Output Voltage Monitor
• Programmable Soft-Start
• Output Overvoltage Protection
• Optional Short-Circuit Shutdown Timer
• Small 24-Lead SSOP Package

Typical Application

Description

The LTC3718 is a high current, high efficiency synchronous switching regulator controller for DDR and QDR™ memory termination. It operates from an input as low as 1.5V and provides a regulated output voltage equal to (0.5)V_IN. The controller uses a valley current control architecture to enable high frequency operation with very low on-times without requiring a sense resistor. Operating frequency is selected by an external resistor and is compensated for variations in V_IN and V_OUT. The LTC3718 uses a pair of standard 5V logic level N-channel external MOSFETs, eliminating the need for expensive P-channel or low threshold devices.

Forced continuous operation reduces noise and RF interference. Fault protection is provided by internal foldback current limiting, an output overvoltage comparator and an optional short-circuit timer. Soft-start capability for supply sequencing can be accomplished using an external timing capacitor. OPTI-LOOP® compensation allows the transient response to be optimized over a wide range of loads and output capacitors.

OPTI-LOOP is a registered trademark of Linear Technology Corporation. No R_SENSE is a trademark of Linear Technology Corporation. QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress Semiconductor, IDT and Micron Technology, Inc.