Features

• 6.0Gbps JESD204B Interface
• Only One Output Lane Required for Both ADCs (F_S ≤ 150Msps)
• 70dBFS SNR
• 90dBFS SFDR
• Low Power: 751mW Total
• Single 1.8V Supply
• Easy to Drive 1.5V_P-P Input Range
• 1.25GHz Full Power Bandwidth S/H
• Optional Clock Divide by Two
• Optional Clock Duty Cycle Stabilizer
• Low Power Sleep and Nap Modes
• Serial SPI Port for Configuration
• 48-Lead (7mm × 7mm) QFN Package

Typical Application

Description

The LTC®2122 is a 2-channel simultaneous sampling 170Msps 14-bit A/D converter with serial JESD204B outputs. It is designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 70dBFS SNR and 90dBFS spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to under-sample high frequencies.

The JESD204B serial interface simplifies the PCB design by minimizing the number of data lines required. At 170Msps, only two 3.4Gbps output lanes are required. For sample rates up to 150Msps, both ADCs may share the same output lane at up to 6.0Gbps.

The DEVCLK⁺ and DEVCLK^– inputs can be driven differentially with sine wave, PECL, or LVDS signals. An optional clock divide-by-two circuit or clock duty cycle stabilizer maintains high performance at full speed for a wide range of clock duty cycles.